1. Field of the Invention
The present invention relates to clock sources for digital circuits. More particularly, the present invention relates to a clock source for reducing electromagnetic interference of digital circuits that can be induced in analog or RF circuits.
2. Description of the Related Art
In modern electronic equipment that is composed of both high speed digital circuitry and highly sensitive analog or RF circuitry a problem of electromagnetic compatibility exists. In practice, the noise generated by high speed digital circuitry consists primarily of discrete high energy spurs located at the harmonics and sub-harmonics of the digital clock frequency. Although shielding and other similar techniques can reduce such interference, considerable efforts must be made to achieve such results.
Several techniques presently exist for reducing interference caused by spurious emissions of a frequency or clock source that involve reducing the energy of spurious emission by spreading the noise over a predetermined frequency spectrum. One such technique involves the use of a digital frequency synthesizer with digital logic, a sine look-up table, an amplitude dither circuit and a digital to analog converter, such as disclosed in U.S. Pat. No. 4,901,265 issued to the Assignee hereof. A synthesizer such as this is more applicable to cases where a clean sinusoidal waveform or modulated sinusoidal waveform is desired.
Another technique is disclosed in U.S. Pat. No. 4,410,954, where digital logic and registers are used to create a phase jittered output signal. The signal generated by such a device is a square wave that is particularly suited for digital circuit clock application. This circuit digitally generates a square wave signal in which successive cycles of the signal are of a periodicity jittered about a nominal periodicity. With a square wave signal of a fundamental frequency and harmonics associated therewith, the jittering of the signal results in a corresponding jittering of the fundamental frequency and associated harmonics.
Such frequency synthesizers are quite flexible in generating an output signal capable of being varied over a large band of frequencies and are effective at reducing peak spectral content of the noise. However due to their complexity and flexibility in frequency generation, such devices may cost more than what is necessary for applications where a constant clock frequency is desired. Furthermore, because both types of synthesizers require an input clock for operation, this clock input by itself may cause emissions of electromagnetic interference at the clock frequency by the digital synthesizer itself.
It is therefore an object of the present invention to provide a simple, low-cost clock source capable of providing a clock signal for digital circuits in which the peak spectral content of the spurious emissions of the clock source and digital circuitry is spread over a specified bandwidth at a reduced level.